The invention relates to a method for planarizing metal films that are deposited on substrates, such as semiconductor wafers which are used for fabricating integrated circuits.
The semiconductor fabrication of VLSI (Very Large Scale Integration) circuits generally involves many stages of processing. One or more of those stages of processing typically involve depositing a metal layer onto an insulating layer (e.g. SiO.sub.2) that partially covers the surface of the wafer. The insulating layer, which was produced during earlier stages of processing, includes an array of contact holes that extend down to devices that have been formed in the underlying semiconductor wafer. The metal layer serves, among other things, to provide conductive interconnects between devices within the integrated circuit. To achieve good electrical contact to the underlying devices, the deposited metal layer must fill the contact holes.
As the capabilities of semiconductor fabrication technology advanced, device size dramatically decreased and, not surprisingly, the dimensions of the openings to the contact holes also decreased. This created certain problems for the metalization stage of processing. The contact holes, which due to their smaller openings now had higher aspect ratios (i.e., ratio of depth to width), were more difficult to fill with metal. Because of the shadowing effect of the walls of the contact holes, the rate of metal deposition on the bottom of the holes was not as high as on the top surface of the wafer. In addition, deposited metal tends to accumulate near the rim of the contact hole at the surface of the insulating layer thereby further masking the hole from receiving metal during deposition.
The reduced device dimensions and the more complex multi-layered device structures which came with the advances in technology also produced other problems. The surface of a deposited metal layer tends to follow the contours of the insulating layer on which it is deposited. The surface of the insulating layer, in turn, tends to follow the contours of underlying structures such as previously deposited metal conducting lines and contact openings formed in lower insulating layers during earlier stages of processing. In other words, the surface of the deposited metal layer contains irregularities, which, if not removed, will interfere with efforts to fabricate the submicron structures on the wafer.
To address these problems, a planarizing step was introduced into the fabrication process. Typically, after depositing a metal layer, or even during the metal deposition step itself, the entire wafer is heated to a temperature near the flow point of the metal that was or is being deposited. The higher wafer temperature causes the deposited metal to flow over the surface of the wafer and into the contact holes. The reflow of metal on the wafer fills the contact holes and reduces the irregularities on the surface of the metal. For aluminum, that temperature that is required to achieve effective reflow is around 525.degree.-530.degree. C., for other materials such as copper, it can be much higher (e.g. above 800 .degree. C.).
However, as fabrication technology advances even further and devices continue to decrease in size, it is also becoming important to reduce the temperature extremes to which the wafer is exposed and the amount of time that the wafer spends at elevated temperatures during processing. Prolonged exposure to high temperatures and the repeated cycling to high temperatures generate stresses in the wafer. The stresses, in turn, tend to produce defects which can destroy the extremely small devices. In addition, long times spent at elevated temperatures during processing also tend to increase unwanted migration of material within the devices. All of this can drastically reduce circuit yields on a wafer. Because of this, integrated circuit manufacturers have begun to impose a tight thermal budgets on their fabrication processes and on the equipment which they use. These thermal budgets are sure to become even tighter in the future as the limits of the technology are pushed even further.